1. Field of the Invention
The present invention relates to a carrier tape on which semiconductor chips are to be mounted by a tape automated bonding (TAB) method and also relates to a method of manufacturing a semiconductor device employing the carrier tape.
2. Description of the Related Art
FIGS. 7A and 7B are a plan view and a sectional view, respectively, of a part of a conventional carrier tape on which a semiconductor chip is mounted. The carrier tape has a film 1 formed of an insulating material such as polyimide. The film 1 has a plurality of perforations 6 formed at equal intervals along edge portions on either side thereof, and a rectangular center device hole 3 formed centrally between the edges which allows a semiconductor chip 2 to be received therein. A plurality of outer lead holes 5 are formed at the periphery of the center device hole 3. A plurality of leads 4 formed of copper are secured to the surface of the film 1. These leads 4 are supported by a lead supporting portion 7 of the film positioned between the center device hole 3 and the outer lead holes 5, 5a, etc. A front end portion of each lead 4 projects into the center device hole 3 as an inner lead 4a, while an intermediate portion of the lead 4 is positioned above the corresponding outer lead hole 5, 5a as an outer lead 4b which is to be connected to an electrode of an external circuit. A test pad 4c is formed at the rear end of each lead 4. The lead supporting portion 7 is linked, at its four corners, to suitable portions of the film 1 by bridge portions 8 each positioned between two adjacent outer lead holes 5.
As shown in FIG. 7B, within the center device hole 3 of the carrier tape, the inner lead 4aof each lead 4 is connected to a bump electrode 21 of the semiconductor chip 2. Thus, a plurality of semiconductor chips 2 are usually mounted on a carrier tape.
Such a tape carrier is sealed with, for instance, in a resin package, in order to protect the semiconductor chips 2, the leads 4, etc. from external forces and the external environment. The resin packages are molded using, for instance, an upper mold part 10a and a lower mold part 10b which have a plurality of cavity halves 12a and 12b, respectively, that correspond to each other, as shown in FIG. 8. Figs. 9A and 9B show, at an enlarged scale, the cavity halves 12a and 12b of the upper and lower mold parts 10a and 10b, respectively. As shown in FIGS. 8 and 9A, the upper mold part 10a also has a runner 14 allowing a resin to flow therein, and a plurality of gates 13 through which the runnner 14 communicates with each of the cavity halves 12a.
During resin molding, the tape carrier is set between the upper mold part 10a and the lower mold part 10b, as shown in FIG. 10. At this time, the tape carrier is aligned in such a manner that each of the semiconductor chips 2 is received in one of the cavity halves 12b of the lower mold part 10b. Thereafter, the upper mold part 10a and the lower mold part 10b are clamped, and a molten resin 11 is injected into cavities defined by the cavity halves 12a of the upper mold part 10a and the cavity halves 12b of the lower mold part 10b, through the runner 14 and the gates 13. After the curing of the resin 11, a molded product, such as that shown in FIG. 11, is taken out from the upper and lower mold parts 10a and 10b. Subsequently, each of the leads 4 is cut along the boundary between the outer lead 4b, and the test pad 4c, and each of the bridge portions 8 of the film 1 is cut off, thereby producing packaged semi conductor devices.
The above described art, however, involves the following problems. Since each of the groove-shaped gates 13 of the upper mold part 10a is positioned above one of the outer lead holes 5a of the film 1, as shown in FIG. 10, during resin molding, a part of a molten resin 11 which is to be injected into the corresponding cavity flows through the gate 13 in the direction indicated by an arror A in FIG. 7A. As a result, the part of the resin 11 enters not only the cavity but also the outer lead hole 5a of the film 1, whereby an unnecessary resin portion 11a is formed, as shown in FIG. 11. Accordingly, it has been necessary after the resin molding process, to remove the unnecessary resin portions 11a, thereby inevitably complicating the manufacture of the packaged semiconductor devices.
In addition, since the leads 4 generally have a relatively small thickness of about 35 .mu.m, their outer leads 4b tend to be broken when the unnecessary resin portions 11a are being removed. This leads to a reduction in yield .